Integrated Circuit Design

Integrated term of enlistment form, or IC practice, is a sub practise of electrical engineering and computer engineering, encompassing the particular logic and racing travel inclination techniques required to fig integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconducting material thingmabob substrate by photolithography. IC devise can be shargond out into the broad categories of digital and analog IC be after. Digital IC design is to disclose components such as micro swear outors, FPGAs, memories (RAM, ROM, and flash) and digital ASICs.Digital design foc affairs on logical correctness, maximizing circuit density, and placing circuits so that time and timing signals be routed efficiently. Analog IC design also has specializations in strength IC design and RF IC design. Analog IC design is utilise in the design of op-amps, linear regulators, phase locked loops, oscillators and quick fi lters. Analog design is more concerned with the physics of the semiconductor windings such as gain, adding, power play, and resistance.Fidelity of analog signal amplification and filtering is usually critical and as a result, analog ICs use life-sizedr bea active devices than digital designs and ar usually less dense in circuitry. Modern ICs argon enormously complicated. A large bunk, as of 2009 has close to 1 one thousand million transistors. The rules for what can and cannot be manufactured are also extremely complex. An IC process as of 2006 may well scram more than 600 rules. Furthermore, since the manufacturing process itself is not completely predictable, designers must account for its statistical nature.The complexity of late IC design, as well as market pressure to produce designs rapidly, has led to the grand use of automated design tools in the IC design process. In short, the design of an IC using EDA software is the design, see, and stoppage of the instruct ions that the IC is to carry out FundamentalsIntegrated circuit design involves the invention of electronic components, such as transistors, resistors, capacitors and the metallic interconnect of these components onto a put together of semiconductor, typically silicon.A method to isolate the man-to-man components formed in the substrate is necessary since the substrate silicon is conductive and often forms an active region of the individual components. The two common methods are p-n junction closing off and scarelectric isolation. Attention must be given to power dissipation of transistors and interconnect resistances and current density of the interconnect, contacts and vias since ICs contain very tiny devices compared to discrete components, where such concerns are less of an issue.Electromigration in metallic interconnect and ESD hurt to the tiny components are also of concern. Finally, the physical layout of certain circuit subblocks is typically critical, in order to han d the desired speed of operation, to segregate clanging portions of an IC from quiet portions, to balance the effects of heat extension crossways the IC, or to facilitate the placement of connections to circuitry outside the IC. Design stepsA typical IC design cycle involves several steps 1. Feasibility study and die size estimate 2. Functional verification 3. rotary/RTL design 4. Circuit/RTL simulation system of logic simulation 5. Floorplanning 6. Design review 7. Layout 8. Layout verification 9. placid timing compend 10. Layout review 11. Design For Test and Automatic test pattern generation12. Design for manufacturability (IC) 13. Mask selective information preparation 14. Wafer fictionalisation 15. Die test 16. Packaging 17. Post silicon validation 18. twirl characterization 19. Tweak (if necessary) 20. Datasheet generation Portable Document Format 21. ramp up 22. Production 23. Yield Analysis / Warranty Analysis reliableness (semiconductor) 24. Failure analysis on an y returns 25. Plan for next generation break short using production information if possible Digital designRoughly speaking, digital IC design can be divided into three move ESL design This step creates the drug user functional specification. The user may use a variety of languages and tools to create this description. Examples include a C/C++ model, SystemC, SystemVerilog Transaction Level Models, Simulink and MATLAB. RTL design This step converts the user specification (what the user wants the tick to do) into a register transfer level (RTL) description.The RTL describes the exact air of the digital circuits on the chip, as well as the interconnections to inputs and outputs. somatogenetic design This step takes the RTL, and a library of available logic gates, and creates a chip design. This involves figuring out which gates to use, defining places for them, and wiring them together. Note that the flash step, RTL design, is responsible for the chip doing the right thing. The third step, physical design, does not modify the functionality at all (if done correctly) simply fixates how fast the chip operates and how a good deal it costs.RTL designThis is the hardest part, and the domain of functional verification. The spec may have some terse description, such as en labels in the MP3 format or implements IEEE floating-point arithmetic. Each of these bare looking statements expands to hundreds of pages of text, and thousands of lines of computer code. It is extremely ticklish to verify that the RTL will do the right thing in all the possible cases that the user may throw at it. Many techniques are used, none of them perfect but all of them useful extensive logic simulation, formal methods, hardware emulation, lint-like code checking, and so on.A tiny error here can seduce the whole chip useless, or worse. The famous Pentium FDIV bug caused the results of a year to be wrong by at most 61 split per million, in cases that occurred very infrequently. No one even noticed it until the chip had been in production for months. Yet Intel was forced to offer to replace, for free, every chip sold until they could fix the bug, at a cost of $475 million (US). tangible design It has been suggested that this article or section be merged with Physical design (electronics). (Discuss) Here are the main steps of physical design.In practice there is not a straightforward progression abundant iteration is required to ensure all objectives are met simultaneously. This is a difficult problem in its own right, called design closure. Floorplanning The RTL of the chip is assigned to take in regions of the chip, input/output (I/O) pins are assigned and large objects (arrays, cores, etc. ) are placed. Logic synthesis The RTL is mapped into a gate-level netlist in the target technology of the chip. spot The gates in the netlist are assigned to nonoverlapping locations on the die area.Logic/placement refinement Iterative logical and placement transfo rmations to close death penalty and power constraints. Clock insertion Clock signal wiring is (commonly, clock trees) introduced into the design. Routing The wires that connect the gates in the netlist are added. Postwiring optimization Performance (timing closure), tone (signal integrity), and yield (Design for manufacturability) violations are removed. Design for manufacturability The design is modified, where possible, to make it as clean and efficient as possible to produce.This is achieved by adding extra vias or adding space metal/diffusion/poly layers wherever possible season complying to the design rules set by the foundry. Final checking Since errors are expensive, time consuming and hard to spot, extensive error checking is the rule, making sure the mapping to logic was done correctly, and checking that the manufacturing rules were followed faithfully. Tapeout and sham generation the design data is turned into photomasks in mask data preparation.Process cornersProces s corners provide digital designers the ability to simulate the circuit while accounting for varietys in the technology process. Analog designBefore the advent of the microprocessor and software base design tools, analog ICs were designed using hand calculations. These ICs were basic circuits, op-amps are one example, usually involving no more than ten transistors and few connections. An iterative trial-and-error process and overengineering of device size was often necessary to achieve a manufacturable IC. Reuse of proven designs allowed progressively more complicated ICs to be built upon prior knowledge.When inexpensive computer processing became available in the 1970s, computer programs were written to simulate circuit designs with greater accuracy than serviceable by hand calculation. The first circuit simulator for analog ICs was called SPICE (Simulation political platform with Integrated Circuits Emphasis). Computerized circuit simulation tools enable greater IC design comp lexity than hand calculations can achieve, making the design of analog ASICs practical. The computerized circuit simulators also enable mistakes to be found early in the design cycle before a physical device is fabricated.Additionally, a computerized circuit simulator can implement more sophisticated device models and circuit analysis too tedious for hand calculations, permitting Monte Carlo analysis and process sensibility analysis to be practical. The effects of parameters such as temperature variation, doping concentration variation and statistical process variations can be simulated easily to determine if an IC design is manufacturable. Overall, computerized circuit simulation enables a higher compass point of confidence that the circuit will work as expected upon manufacture. heading with variablenessA challenge most critical to analog IC design involves the variability of the individual devices built on the semiconductor chip. Unlike board-level circuit design which permits the designer to select devices that have each been tested and binned according to value, the device values on an IC can vary widely which are uncontrollable by the designer. For example, some IC resistors can vary 20% and ? of an integrated BJT can vary from 20 to 100. To add to the design challenge, device properties often vary between each processed semiconductor wafer. thingumajig properties can even vary significantly across each individual IC due to doping gradients. The underlying cause of this variability is that many semiconductor devices are highly sensitive to uncontrollable random variances in the process. tenuous changes to the amount of diffusion time, uneven doping levels, etc. can have large effects on device properties. Some design techniques used to mortify the effects of the device variation are victimisation the ratios of resistors, which do match near, rather than absolute resistor value.Using devices with matched geometrical shapes so they have matched vari ations. Making devices large so that statistical variations becomes an insignificant fraction of the boilersuit device property. Segmenting large devices, such as resistors, into parts and interweaving them to cancel variations. Using common centroid device layout to cancel variations in devices which must match closely (such as the transistor differential pair of an op amp). VendorsThe four largest companiescitation needed selling electronic design automation tools are Synopsys, Cadence, Mentor Graphics, and Magma.